Comparative Study of Crosstalk Reduction Techniques for Parallel Microstriplines

Author:

Rajeswari P.,Raju S.

Publisher

Springer Berlin Heidelberg

Reference6 articles.

1. Lee, K., Jung, H.-K., Chi, H., Kwon, H.J., Sim, J.-Y., Park, H.J.: Serpentine Microstrip Lines with Zero Far End Crossstalk for Parallel High Speed DRAM Interfaces. Proceedings of the IEEE 33(2), 552–558 (2010)

2. Lee, K., Lee, H.B., Jung, H.-K., Sim, J.Y., Park, H.J.: A Serpentine Guard Trace to Reduce the Far End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel MicrostripLines. Proceedings of the IEEE 31(4), 809–817 (2008)

3. Sohn, Y.S., Lee, J.C., Park, H.J.: Empirical equations on electrical parameters of coupled microstrip lines for crosstalk estimation in printed circuit board. IEEE Trans. Adv. Packag. 24(4), 521–527 (2001)

4. Li, Z., Wang, Q., Shi, C.: Application of Guard Traces with Vias in the RF PCB Layout. Proceedings of the IEEE (2002)

5. Lee, K., Lee, H.-B., Jung, H.-K., Sim, J.-Y., Park, H.-J.: Serpentine guard trace to reduce far-end crosstalk and even-odd mode velocity mismatch of microstrip lines by more than 40%. In: Electron. Compon. Technol. Conf., Reno, NV, pp. 329–332 (2007)

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