FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA-Reference-Cited by-同舟云学术

FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA

Published:2011 Issue: Volume: Page:253-260
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
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Author:

Duhem François,Muller Fabrice,Lorenzini Philippe

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-19475-7_26

Reference11 articles.

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2. Paulsson, K., Hübner, M., Bayar, S., Becker, J.: Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. In: International Conference on Field Programmable Logic and Applications, FPL 2008, pp. 699–700 (2008)

3. Xilinx Inc.: Virtex-5 Configuration User Guide (2010)

4. Xilinx Inc.: LogiCORE IP XPS HWICAP datasheet (2010)

5. Liu, M., Kuehn, W., Lu, Z., Jantsch, A.: Run-time Partial Reconfiguration Speed Investigation and Architectural Design Space Exploration. In: International Conference on Field Programmable Logic and Applications, FPL 2009 (2009)

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