FPGA Optimizations for a Pipelined Floating-Point Exponential Unit-Reference-Cited by-同舟云学术

FPGA Optimizations for a Pipelined Floating-Point Exponential Unit

Published:2011 Issue: Volume: Page:316-327
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Alachiotis Nikolaos,Stamatakis Alexandros

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-19475-7_34

Reference21 articles.

1. Alachiotis, N., Sotiriades, E., Dollas, A., Stamatakis, A.: Exploring FPGAs for Accelerating the Phylogenetic Likelihood Function. In: Proceedings of HICOMB 2009, Rome, Italy, pp. 1–8 (2009)

2. Alachiotis, N., Stamatakis, A., Sotiriades, E., Dollas, A.: A Reconfigurable Architecture for the Phylogenetic Likelihood Function. In: Proceedings of FPL 2009, Prague, pp. 674–678 (September 2009)

3. Stamatakis, A.: RAxML-VI-HPC: maximum likelihood-based phylogenetic analyses with thousands of taxa and mixed models. Bioinformatics 22(21), 2688–2690 (2006)

4. Pottathuparambil, R., Sass, R.: A Parallel/Vectorized Double-Precision Exponential Core to Accelerate Computational Science Applications. In: Proceedings of FPGA 2009, Monterey, California, USA, pp. 285–285 (2009)

5. Pottathuparambil, R., Sass, R.: Implementation of a CORDIC-based Double-Precision Exponential Core on an FPGA. In: Proceedings of RSSI 2008, Urbana, Illinois, USA (2008)

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