Author:
Bhadauria Major,McKee Sally A.,Singh Karan,Tyson Gary S.
Publisher
Springer Berlin Heidelberg
Reference24 articles.
1. Agarwal, A., Pudar, S.: Column-associative caches: A technique for reducing the miss rate of direct-mapped caches. In: Proc. 20th IEEE/ACM International Symposium on Computer Architecture, pp. 169–178 (May 1993)
2. Albonesi, D.: Selective cache ways: On-demand cache resource allocation. In: Proc. IEEE/ACM 32nd International Symposium on Microarchitecture, pp. 248–259 (November 1999)
3. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework for architectural-level power analysis and optimizations. In: Proc. 27th IEEE/ACM International Symposium on Computer Architecture, pp. 83–94 (2000)
4. Calder, B., Grunwald, D., Emer, J.: Predictive sequential associative cache. In: Proc. 2nd IEEE Symposium on High Performance Computer Architecture, pp. 244–253 (February 1996)
5. Flautner, K., Kim, N., Martin, S., Blaauw, D., Mudge, T.: Drowsy caches: Simple techniques for reducing leakage power. In: Proc. 29th IEEE/ACM International Symposium on Computer Architecture, pp. 147–157 ( May 2002)