Extending the Cell SPE with Energy Efficient Branch Prediction

Author:

Briejer Martijn,Meenderinck Cor,Juurlink Ben

Publisher

Springer Berlin Heidelberg

Reference17 articles.

1. Hofstee, H.: Power Efficient Processor Architecture and the Cell Processor. In: Proc. Int. Symp. on High-Performance Computer Architecture, HPCA (2005)

2. Gou, C., Kuzmanov, G., Gaydadjiev, G.N.: Sams: Single-affiliation multiple-stride parallel memory scheme. In: Proc. Workshop on Memory Access on Future Processors: a Solved Problem? (2008)

3. Meenderinck, C., Juurlink, B.: Specialization of the Cell SPE for Media Applications. In: Proc. Int. Conf on Application-Specific Systems, Architectures and Processors (2009)

4. Flachs, B., et al.: Microarchitecture and Implementation of the Synergistic Processor in 65-nm and 90-nm SOI. IBM Journal of Research and Development 51(5) (2007)

5. Cabarcas, F., Rico, A., Rodenas, D., Martorell, X., Ramirez, A., Ayguade, E.: CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator. In: XVIII Jornadas de Paralelismo (2006)

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