Prototype Design of Hierarchical Cluster Multiprocessor on Platform FPGA
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-25349-2_91.pdf
Reference13 articles.
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3. Kapasi, U.J., et al.: Programmable stream processors. IEEE Computer 36(8) (2003)
4. Maxiaguine, A., Kunzli, S., Chakraborty, S., Thiele, L.: Rate analysis for streaming applications with on-chip buffer constraints. In: ASP-DAC 2004 (2004)
5. Benini, L., De Micheli, G.: Networks on Chips: A New SoC Paradigm. Computer 35(1), 70–78 (2002)
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