1. PILSOO L, JAE K L, KYOO Y L, INCHAE S, BOO G K. Analysis of EMI dependence on signal duty and supplied voltage [C]// IEEE Workshop on Signal Propagation on Interconnects. Strasbourg: IEEE, 2009: 1–4.
2. KIM N K, HWANG J S, KIM S Y. EMI prediction of slew-rate controlled I/O buffers by full-wave and circuit Co-simulation [J]. Journal of Semiconductor Technology and Science, 2014, 14(4): 471–477.
3. CHAN R S, TAN N F, MOKHTAR M R. Simultaneous switching noise impact to signal eye diagram on high-speed I/O [C]// 4th Asia Symp on Quality Electronic Design. Penang: IEEE, 2012: 200–205.
4. HARUYA F, YO I, TOSHIO S. Measurement and analysis of SSN and Jitter of FPGA [C]// 2012 Int Symp on Electromagnetic Compatibility. Rome: IEEE, 2012: 1–6.
5. OIKAWA R, GOPE D, JANDHYALA V. Return-path extraction technique for SSO analysis of low-cost wire-bonding BGA packages [J]. IEEE Transaction on Components, Packaging and Manufacturing Technology, 2012, 2(4): 677–686.