*BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions

Author:

Arditi Laurent

Publisher

Springer Berlin Heidelberg

Reference33 articles.

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2. L. Arditi and H. Collavizza. An object-oriented framework for the formal verification of processors. In European Conference on Object-Oriented Programming, volume 952 of LNCS, 1995.

3. L. Arditi and H. Collavizza. Towards verifying VHDL descriptions of processors. In European Design Automation Conference with EURO-VHDL, 1995.

4. P. J. Ashenden. The VHDL Cookbook. Public Domain, Dept. Computer Science, University of Adelaide, South Australia, first edition, July 1990.

5. D. L. Beatty and R. E. Bryant. Formally verifying a microprocessor using a simulation methodology. In31st ACM/IEEE Design Automation Conference, 1994.

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