1. “Crossing the abyss: asynchronous signals in a synchronous world.” Mike Stein, Paradigm Works, EDN Magazine, July, 24, 2003
2. “Practical design for transferring signals between clock domains.” Michael Crews and Yong Yuenyongsgool, Philips Semiconductors, EDN Magazine, February, 20, 2003
3. Simulation and Synthesis Techniques for Asynchronous FIFO Design, Rev 1.2, Clifford E. Cummings, Sunburst Design, Inc., SNUG (Synopsys User Group Conference), San Jose, 2002
4. Verilog Digital Computer Design - Algorithms into Hardware. Mark Gordon Arnold, University of Wyoming, Prentice Hall PTR, 1999
5. Verilog HDL Synthesis - A Practical Primer. J. Bhasker, Bell Labs, Lucent Technologies, Star Galaxy Publishing, 1998