Codesign of a parallel architecture and an optimizing compiler backend: SIN rete processing as a case study-Reference-Cited by-同舟云学术

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Codesign of a parallel architecture and an optimizing compiler backend: SIN rete processing as a case study

Published:1996-01 Issue:1-2 Volume:1 Page:147-176
ISSN:0929-5585
Container-title:Design Automation for Embedded Systems
language:en
Short-container-title:Des Autom Embed Syst

Author:

ten Hagen Klaus,Steinberg Dirk,Meyr Heinrich

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Software

Link

http://link.springer.com/content/pdf/10.1007/BF00134686.pdf

Reference32 articles.

1. Anurag Acharya, Milind Tambe, and Anoop Gupta. Implementation of Production Systems on Message-Passing Computers. Transactions on Parallel and Distributed Processing, 3(4):477?487, July 1992.

2. Alfred V. Aho, Ravi Sethi, and Jeffrey D. Ullman. Compilers: Principles, Techniques, and Tools. Addison-Wesley Publishing Company, 1986.

3. David Becker, Raj K. Singh, and G. Tell. An engineering environment for hardware/software cosimulation. In 29th Design Automation Conference, pages 129?134. ACM/IEEE, 1992.

4. Michael C. Becker, Michael S. Allen, Charles R. Moore, John S. Muhich, and David P. Tuttle. The PowerPC 601 Microprocessor. IEEE Micro, pages 54?68, October 1993.

5. Lee Brownston, Robert Farell, Elaine Kant, and Nancy Martin. Programming Expert Systems in OPS5. Addison-Wesley Publishing Company, 1986.

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