Increasing the Bitlength of a Crypto-Coprocessor-Reference-Cited by-同舟云学术

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Increasing the Bitlength of a Crypto-Coprocessor

Published:2003 Issue: Volume: Page:71-81
ISSN:0302-9743
Container-title:Cryptographic Hardware and Embedded Systems - CHES 2002
language:
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Author:

Fischer Wieland,Seifert Jean-Pierre

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-36400-5_7

Reference17 articles.

1. Lect Notes Comput Sci;P. Barret,1986

2. Lect Notes Comput Sci;S. Cavallar,2000

3. C. Couvreur, J.-J. Quisquater, “Fast decipherment algorithm for RSA public-key cryptosystem”, Electronics Letters 18(21):905–907, 1982.

4. Lect Notes Comput Sci;J.-F. Dhem,1998

5. H. Handschuh, P. Pailler, “Smart Card Crypto-Coprocessors for Public-Key Cryptography”, CryptoBytes 4(1):6–11, 1998.

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Recursive Double-Size Modular Multiplications without Extra Cost for Their Quotients;Topics in Cryptology – CT-RSA 2009;2009

2. Bipartite modular multiplication with twice the bit-length of multipliers;International Journal of Information Security;2008-07-05

3. A Black Hen Lays White Eggs;Smart Card Research and Advanced Applications;2008

4. Using an RSA Accelerator for Modular Inversion;Cryptographic Hardware and Embedded Systems – CHES 2005;2005

5. Fast Truncated Multiplication for Cryptographic Applications;Cryptographic Hardware and Embedded Systems – CHES 2005;2005

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