Process optimization of polymetal (W/WN/Polysilicon) gate and its impact on dynamic random-access memory chip performance in 0.14-µm technology-Reference-Cited by-同舟云学术

Process optimization of polymetal (W/WN/Polysilicon) gate and its impact on dynamic random-access memory chip performance in 0.14-µm technology

Published:2002-10 Issue:10 Volume:31 Page:988-993
ISSN:0361-5235
Container-title:Journal of Electronic Materials
language:en
Short-container-title:Journal of Elec Materi

Author:

Shim Pil Bo,Choy Jun-Ho,Gil Gyung Sun,Kyung Ki Myung,Park Ju Cheol

Publisher

Springer Science and Business Media LLC

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://link.springer.com/content/pdf/10.1007/s11664-002-0032-8.pdf

Reference7 articles.

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4. N.S. Kim, I.G. Kim, J.H. Choy, and J.S. Park, Jpn. J. Appl. Phys. 41, 2385 (2002).

5. K.A. Jenkins, J.N. Burghartz, and P.D. Agnello, Trans. Electron. Dev. 43, 759 (1996).

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