Complete Finite Prefixes of Symbolic Unfoldings of Safe Time Petri Nets

Author:

Chatain Thomas,Jard Claude

Publisher

Springer Berlin Heidelberg

Reference18 articles.

1. Kitai, T., Oguro, Y., Yoneda, T., Mercer, E., Myers, C.: Partial order reduction for timed circuit verification based on a level oriented model. IEICE Trans. E86-D(12), 2601–2611 (2001)

2. Lecture Notes in Computer Science;W. Penczek,2001

3. Chatain, T., Jard, C.: Time Supervision of Concurrent Systems Using Symbolic Unfoldings of Time Petri Nets. In: Pettersson, P., Yi, W. (eds.) FORMATS 2005. LNCS, vol.??3829, pp. 196???210. Springer, Heidelberg (2005);

4. Extended version available in INRIA Research Report RR-5706

5. Lecture Notes in Computer Science;T. Aura,1997

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