Author:
Keane John,Wang Xiaofei,Jain Pulkit,Kim Chris H.
Reference45 articles.
1. M. Denais, C. Parthasarathy, G. Ribes, Y. Rey-Tauriac, N. Revil, A. Bravaix, V. Huard, and F. Perrier. On-the-fly Characterization of NBTI in Ultra-Thin Gate Oxide PMOSFETs. IEEE International Electron Devices Meeting, pages 109-112, 2004.
2. M. Denais, A. Bravaix, V. Huard, C. Parthasarathy, C. Guerin, G. Ribes, F. Perrier, M. Mairy, and D. Roy. Paradigm Shift for NBTI Characterization in Ultra-Scaled CMOS Technologies. IEEE International Reliability Physics Symposium, pages 735-736, 2006.
3. C. Shen, M.-F. Li, C. Foo, T. Yang, D. Huang, A. Yap, G. Samudra, and Y.-C. Yeo. Characterization and Physical Origin of Fast Vth Transient in NBTI of pMOSFETs with SiON Dielectrics. IEEE Electron Devices Meeting, pages 1-4, 2006.
4. T. Grasser, W. Gös, V. Sverdlov, and B. Kaczer. The Universality of NBTI Relaxation and Its Implications for Modeling and Characterization. IEEE International Reliability Physics Symposium, pages 268-280, 2007.
5. T. Fischer, E. Amirante, K. Hofmann, M. Ostermayr, P. Huber, and D. Schmitt-Landsiedel. A 65 nm Test Structure for the Analysis of NBTI Induced Statistical Variation in SRAM Transistors. IEEE European Solid-State Device Research Conference, pages 51-54, 2008.
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