1. M.C. McFarland, A.C. Parker, “Tutorial on High-Level Synthesis”, Proc. of the 25th Design Automation Conference, July 1988, pp. 330–336.
2. P.G. Paulin, J.P. Knight, E.F. Girczyc, “HAL: A Multi-Paradigm Approach to Automatic Data Path Synthesis”, Proc. of 23rd Design Automation Conference, July 1986, pp. 263–270.
3. P.G. Paulin, J.P. Knight, “Force-Directed Scheduling in Automatic Data Path Synthesis”, Proc. of the 24th Design Automation Conference, Miami Beach, July 1987, pp. 195–202.
4. P.G. Paulin, “High-Level Synthesis of Digital Circuits Using Global Scheduling and Binding Algorithms”, Ph.D. Thesis, Carleton University, Ottawa, Canada, February 1988.
5. P.G. Paulin, J.P. Knight, “Force-Directed Scheduling for the Behavioral Synthesis of ASICs”, IEEE Transactions on CAD of ICs and Systems, Vol. 8 (6), June 1989, pp. 661–679.