Author:
Shafik Rishad A.,Al-Hashimi Bashir M.,Chakrabarty Krishnendu
Reference76 articles.
1. J.A. Abraham, D.P. Siewiorek, An algorithm for the accurate reliability evaluation of triple modular redundancy networks. IEEE Trans. Comput. 23(7), 682–692 (1974)
2. B.M. Al-Hashimi (ed.), System-on-Chip: Next Generation Electronics, chap. 17 (IEE Circuits, Devices and Systems, London, 2006)
3. S. Aminzadeh, A. Ejlali, A comparative study of system-level energy management methods for Fault-Tolerant hard real-time systems. IEEE Trans. Comput. 60(9), 1288–1299 (2011)
4. L. Anghel, D. Alexandrescu, M. Nicolaidis, Evaluation of a soft error tolerance technique based on time and/or space redundancy, in Proceedings of the International Symposium on Integrated Circuit Design and System Design, Manaus (IEEE Computer Society, Los Alamitos, 2000), p. 237
5. ARM, Advanced microprocessor bus architecture (AMBA) specification, v2.0 (1999), http://www.arm.com
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献