Author:
Gopalakrishnan Ganesh C.,Fujimoto Richard M.,Akella Venkatesh,Mani N. S.,Smith Kevin N.
Reference45 articles.
1. T.S. Anantharaman, E.M. Clarke, M.J. Foster, and B. Mishra. Compiling Path Expressions into VLSI Circuits. InProceedings of the 12th Symposium on Principles of Programming Languages, ACM, January 1985.
2. Jean-Loup Baer. Modelling Architectural Features With Petri Nets. InPetri Nets: Applications and Relationships to Other Models of Concurrency pages 258-275, Springer Verlag, September 1986. LNCS 255.
3. M. Browne, Edmund Clarke, D. Dill, and B. Mishra. Automatic Verification of Sequential Circuits using Temporal Logic. InProceedings of the Seventh International Conference on Computer Hardware Description Languages, pages 98- 113, North-Holland, 1985.
4. Frederick P. Brooks.The Mythical Man-month. Addison-Wesley, 1975.
5. Randall E. Bryant. A Switch Level Model and Simulator for MOS Digital Systems.IEEE Transactions on Computer, C-33: 160 - 177, February 1984.
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