A tutorial on using PVS for hardware verification-Reference-Cited by-同舟云学术

A tutorial on using PVS for hardware verification

Published:1995 Issue: Volume: Page:258-279
ISSN:0302-9743
Container-title:Theorem Provers in Circuit Design
language:
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Author:

Owre S.,Rushby J. M.,Shankar N.,Srivas M. K.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-59047-1_53.pdf

Reference31 articles.

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3. R. S. Boyer and J. S. Moore. A Computational Logic. Academic Press, New York, NY, 1979.

4. R. S. Boyer and J. S. Moore. A Computational Logic Handbook. Academic Press, New York, NY, 1988.

5. J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and L. J. Hwang. Symbolic model checking: 220 states and beyond. In 5th Annual IEEE Symposium on Logic in Computer Science, pages 428–439, Philadelphia, PA, June 1990. IEEE Computer Society.

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