Self-timed logic using Current-Sensing Completion Detection (CSCD)

Author:

Dean Mark E.,Dill David L.,Horowitz Mark

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Information Systems,Signal Processing

Reference16 articles.

1. C.L. Seitz, “System timing,” in Mead and Conway, eds.,Introduction to VLSI Systems, Reading, MA: Addison-Wesley, 1980, chap. 7.

2. T.S. Anantharaman, “A delay insensitive regular expression,”IEEE VLSI Technical Bulletin, 1986.

3. I. David, R. Ginosar, and M. Yoeli, “An efficient implementation of Boolean functions as self-timed circuits,” Technion and Israel Institute of Technology, 1989.

4. A. Martin, “On the existence of delay-insensitive circuits,” MIT Conference on Advanced Research in VLSI, March 1989.

5. MIT Laboratory for Computer Science Technical Report TR-258;N.P. Singh,1981

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