The torus routing chip-Reference-Cited by-同舟云学术

The torus routing chip

Published:1986-12 Issue:4 Volume:1 Page:187-196
ISSN:0178-2770
Container-title:Distributed Computing
language:en
Short-container-title:Distrib Comput

Author:

Dally William J.,Seitz Charles L.

Publisher

Springer Science and Business Media LLC

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science

Link

http://link.springer.com/content/pdf/10.1007/BF01660031.pdf

Reference17 articles.

1. Bryant R, Schuster M, Whiting D (1983) MOSSIM II: A Switch-Level Simulator for MOS LSI User's manual Caltech Tech Rep 5033: TR: 82 (January)

2. Dally WJ, Seitz CL (1986) Deadlock-free message routing in multiprocessor interconnection networks. Dept Comput Sci, California Institute of Technology, Tech Rep 5206: TR:86

3. Dally WJ: CNTK: An embedded language for circuit description. Dept Comput Sci, California Institute of Technology, Display File (in preparation)

4. Fisher AL, Kung HT (1985) Synchronizing large VLSI Processor arrays. IEEE Trans Comp, C-34(8) 734–740

5. Gunther KD (1981) Prevention of deadlocks in packetswitched data transport systems. IEEE Trans Commun COM-29, (4) 512–524

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