ASiPEC: An Application Specific Instruction-Set Processor for High Performance Entropy Coding

Author:

Choi Seung-Hyun,Park Neungsoo,Song Yong Ho,Lee Seong-Won

Publisher

Springer Netherlands

Reference12 articles.

1. Alle M, Biswas J, Nandy SK (2006) High performance VLSI architecture design for H.264 CAVLC decoder. In: International conference on application-specific systems, architectures and processors, pp. 317–322

2. Han JH, Lee MY, Bae Y, Cho H (2005) Application specific processor design for H. 264 decoder with a configurable embedded processor. ETRI J 27(5):491–496

3. Jo HH, Seo JH, Sim DG, Kim DH, Song JH, Kim D, Lee S (2013) Bitstream parsing processor with emulation prevention bytes removal for H.264/AVC decoder. In: IEEE international conference of consumer electronics, pp. 27–28

4. Kim KW, Park SH, Paek YH (2009) Application-specific instruction set processor for H.264 on-chip encoder. ISOCC, pp. 373–376

5. Kim SD, Sunwoo MH (2008) ASIP approach for implementation of H. 264/AVC. J Sign Proces Syst 50(1):53–67

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