0.5-V Low-Power Analog Circuits

Author:

Maurath Dominic,Manoli Yiannos

Publisher

Springer Netherlands

Reference49 articles.

1. ITRS. (2009) The international technology roadmap for semiconductors. ITRS, http://public.itrs.net

2. Y. Taur, Cmos scaling beyond 0.1 $$\mu $$ μ m: how far can it go?, in Proceedings IEEE VLSI Circuits Symp. Digest of Technical Papers, pp. 6–9 (1999)

3. P. Kinget, S. Chatterjee, Y. Tsividis, Ultra-low voltage analog design techniques for nanoscale cmos technologies, in Proceedings IEEE Conf. on Electron Devices and Solid-State Circuits, 19–21, pp. 9–14 (2005)

4. S. Roundy, P.K. Wright, J. Rabaey, A study of low level vibrations as a power source for wireless sensor nodes. J. Comput. Commun. 26(11), 1131–1144 (2003)

5. D. Johns, K. Martin, Analog Integrated Circuit Design (Wiley, New York, 1997)

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