1. K. Kahng, S. Sze, A floating gate and its application to memory devices. IEEE Trans. Electron Dev. Bd. 46, 629 (1967)
2. F. Masuoka, M. Asano, H. Iwahashi, T. Komuro, S. Tanaka, A new Flash E2PROM cell using triple polysilicon technology, in IEEE IEDM Techn Digest, pp. 464–467, Washington, 1984.
3. M. Bauer, R. Alexis, G. Atwood, B. Baltar, A. Fazio, K. Frary, M. Hensel, M. Ishac, J. Javanifard, M. Landgraf, D. Leak, K. Loe, D. Mills, P. Ruby, R. Rozman, S. Sweha, S. Talreja, K. Wojciechowski, A multilevel-cell 32Mb flash memory, in ISSCC Digest of Technical Papers, pp. 132–133, San Francisco, 1995.
4. K.-D. Suh, B.-H. Suh, Y.-H. Um, J.-K. Kim, Y.-J. Choi, Y.-N. Koh, S.-S. Lee, S.-C. Kwon, B.-S. Choi, J.-S. Yum, J.-H. Choi, J.-R. Kim, H.-K. Lim, A 3.3V 32Mb NAND flash memory with incremental step pulse programming scheme, in ISSCC Digest of Technical Papers, pp. 128–129, San Francisco, 1995.
5. P. Xuan, M. She, B. Harteneck, A. Liddle, J. Bokor, T.-J. King, FinFET SONOS flash memory for embedded applications, in IEDM Technical Digest, pp. 609–612, Washington, 2003.