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Network-on-Chip Design

Published:2017 Issue: Volume: Page:461-489
ISSN:
Container-title:Handbook of Hardware/Software Codesign
language:
Short-container-title:

Author:

Bokhari Haseeb,Parameswaran Sri

Publisher

Springer Netherlands

Link

http://link.springer.com/content/pdf/10.1007/978-94-017-7267-9_16

Reference109 articles.

1. ARM AMBA Interconnect Specification. http://www.arm.com/products/system-ip/amba-specifications.php

2. EZChip TileGX Multicore Architecture. http://www.tilera.com/products/?ezchip=585&spage=614

3. IBM CoreConnect Bus Technology. http://www.xilinx.com/products/intellectual-property/dr_pcentral_coreconnect.html

4. Sonics. http://www.sonicsinc.com/

5. Xtensa Processors. http://ip.cadence.com/ipportfolio/tensilica-ip/xtensa-customizable

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Overview of Formal Verification of Network-on-Chip (NoC) Methods;Lecture Notes in Networks and Systems;2024

2. Network-On-Chip Topologies: Potentials, Technical Challenges, Recent Advances and Research Direction;Network-on-Chip [Working Title];2021-04-13

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