Author:
Chaikalis D. P.,Sgouros N. P.,Maroulis D. E.,Sangriotis M. S.
Publisher
Springer Science and Business Media LLC
Reference35 articles.
1. Agostini, L.V., Silva, I.S., Bampi, S.: Pipelined fast 2D DCT architecture for JPEG image compression. In: Proceedings of the 14th Symposium on Integrated Circuits and Systems Design. Pirenopolis, Brazil, pp. 226–231 (2001)
2. Celoxica, R.C.: 1000-PP development board: hardware reference, http://www.celoxica.com
3. Chaikalis, D., Sgouros, N., Maroulis, D., Papageorgas, P.: Hardware implementation of a disparity estimation scheme for real-time compression in 3d imaging applications. J. Vis. Commun. Image Represent. 19(1), 1–11 (2008)
4. Chen, G.B., Lu, X.N., Wang, X.G., Liu, J.L.: A complexity-scalable software-based MPEG-2 video encoder. J. Zhejiang Univ. Sci. 5(5), 572–578 (2004)
5. Cheng, S.C., Hang, H.M.: A comparison of block-matching algorithms mapped to systolic-array implementation. IEEE Trans. Circuits Syst. for Video Technol. (CSVT) 7(5), 741–757 (1997)
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献