An efficient parallel-pipelined intra prediction architecture to support DCT/DST engine of HEVC encoder-Reference-Cited by-同舟云学术

An efficient parallel-pipelined intra prediction architecture to support DCT/DST engine of HEVC encoder

Published:2022-02-21 Issue:3 Volume:19 Page:539-550
ISSN:1861-8200
Container-title:Journal of Real-Time Image Processing
language:en
Short-container-title:J Real-Time Image Proc

Author:

Poola Lakshmi^ORCID,Aparna P.

Publisher

Springer Science and Business Media LLC

Subject

Information Systems

Link

https://link.springer.com/content/pdf/10.1007/s11554-022-01206-2.pdf

Reference20 articles.

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2. Sullivan, G.J., Ohm, J.R., Han, W.J., Wiegand, T.: Overview of the High Efficiency Video Coding (HEVC) Standard. IEEE Trans. Circ. Syst. Video Technol. 22(12), 1649–1668 (2012)

3. Sze, V., Budagavi, M., Sullivan, G.: J, High efficiency video coding (HEVC), 40. Springer, New York (2014)

4. Bossen, F., Bross, B., Suhring, K., Flynn, D.: HEVC Complex Implement. Anal. 22, 1685–1696 (2012)

5. Wien, M.: High efficiency video coding, Coding Tools and specification, 40, 133–160. Springer, New York (2015)

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