A flexible mixed-signal image processing pipeline using 3D chip stacks

Author:

Shi Lan,Soell Christopher,Pfundt Benjamin,Baenisch Andreas,Reichenbach Marc,Seiler Juergen,Ussmueller Thomas,Weigel Robert

Funder

Deutsche Forschungsgemeinschaft

Publisher

Springer Science and Business Media LLC

Subject

Information Systems

Reference29 articles.

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3. Cheng, C.-H., Hsieh, H.-C., Fan, T.-Y., Tang, W.-X., Liu, C.-K., Huang, P.-H.: High resolution and frame rate image signal processor array design for 3-D imager. In: International Symposium on Intelligent Signal Processing and Communications Sys- tems (ISPACS), 2012, pp. 735–739 (2012)

4. Di Federico, M., Julian, P., Andreou, A.G., Mandolesi, P.S.: Fully functional fine-grain vertically integrated 3D focal plane neuromorphic processor. In: SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014, pp. 1–2 (2014)

5. Dubois, J., Ginhac, D., Paindavoine, M., Heyrman, B.: A 10,000 fps CMOS sensor with massively parallel image processing. Solid-State Circ, IEEE J, 43(3), 706–717 (2008). ISSN: 0018-9200. doi: 10.1109/JSSC.2007.916618

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1. Special issue on heterogeneous real-time image processing;Journal of Real-Time Image Processing;2018-03

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