Partial-Order Reduction for GPU Model Checking
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Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-46520-3_23
Reference28 articles.
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4. Barnat, J., Brim, L., Ročkai, P.: Parallel partial order reduction with topological sort proviso. In: Proceedings of the 8th IEEE International Conference on Software Engineering and Formal Methods, pp. 222–231. IEEE (2010)
5. Bartocci, E., Defrancisco, R., Smolka, S.A.: Towards a GPGPU-parallel SPIN model checker. In: Proceedings of SPIN 2014, pp. 87–96. ACM, San Jose (2014)
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