1. Abramovici, M., Breuer, M.A., Friedman, A.D.: Digital Systems Testing and Testable Design. Computer Science Press, New York (1990)
2. Abramovici, M.: A reconfigurable design-for-debug infrastructure for SoCs. In: Proceedings of IEEE/ACM Design Automation Conference, pp. 7–12 (2006)
3. Anis, E., Nicolici, N.: On using lossless compression of debug data in embedded logic analysis. In: Proceedings of 2007 IEEE International Test Conference (ITC) (2007)
4. Bardell, P.H., McAnney, W.H., Savir, J.: Built-in test for VLSI: Pseudorandom Techniques. Wiley, New York (1987)
5. Bayazit, A.A., Malik, S.: Complementary use of runtime validation and model checking. In: Proceedings of ICCAD-2005, IEEE/ACM International Conference on Computer-Aided Design, pp. 1052–1059 (2005)