An XDL Analysis Method for SRAM-Based FPGA
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Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-48499-0_29
Reference11 articles.
1. Srinivasan, S., Gayasen, A., Vijaykrishnan, N.: Improving soft-error tolerance of FPGA configuration bits. In: International Conference on Computer-Aided Design, pp. 107–110. IEEE (2004)
2. Zhu, M., Song, N., Pan, X.: Mitigation and experiment on neutron induced single-event upsets in SRAM-based FPGAs. IEEE Trans. Nucl. Sci. 60(4), 3063–3073 (2013)
3. Zarandi, H.R., Miremadi, S.G., Pradhan, D.K.: Soft error mitigation in switch modules of SRAM-based FPGAs. In: IEEE International Symposium on Circuits and Systems, pp. 141–144. IEEE (2007)
4. Asadi, G., Tahoori, M.B.: Soft error rate estimation and mitigation for SRAM-based FPGAs. In: Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field-Programmable Gate Arrays, pp. 149–160. ACM (2005)
5. Asadi, G., Tahoori, M.B.: An accurate ser estimation method based on propagation probability. Comput. Sci. 1, 306–307 (2005)
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