An Implementation of Parallel 1-D Real FFT on Intel Xeon Phi Processors-Reference-Cited by-同舟云学术

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An Implementation of Parallel 1-D Real FFT on Intel Xeon Phi Processors

Published:2017 Issue: Volume: Page:401-410
ISSN:0302-9743
Container-title:Computational Science and Its Applications – ICCSA 2017
language:
Short-container-title:

Author:

Takahashi Daisuke

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-319-62392-4_29

Reference19 articles.

1. http://www.top500.org/

2. OpenMP Application Program Interface. http://www.openmp.org/mp-documents/spec30.pdf

3. Intel Math Kernel Library Developer Reference (2017). https://software.intel.com/sites/default/files/managed/ff/c8/mkl-2017-developer-reference-c_0.pdf

4. Bailey, D.H.: FFTs in external or hierarchical memory. J. Supercomput. 4, 23–35 (1990)

5. Brigham, E.O.: The Fast Fourier Transform and Its Applications. Prentice-Hall, Upper Saddle River (1988)

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1. An Implementation of Parallel Number-Theoretic Transform Using Intel AVX-512 Instructions;Computer Algebra in Scientific Computing;2022

2. A scheduling policy to save 10% of communication time in parallel fast Fourier transform;Concurrency and Computation: Practice and Experience;2021-07-18

3. FFTE on SVE;Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region;2020-01-15

4. Glance on Parallelization of FFT Algorithms;Land Forces Academy Review;2019-03-01

5. Parallel FFT Algorithms for Shared-Memory Parallel Computers;High-Performance Computing Series;2019

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