Applying Operations Research to Design for Test Insertion Problems

Author:

Kieffer Yann,Zaourar Lilia

Publisher

Springer International Publishing

Reference16 articles.

1. Aktouf, C., Fleury, H., Robach, C.: Inserting scan at the behavorial level. IEEE Des. Test Comput. 17, 34–42 (2000)

2. Asaka, T., Bhattacharya, S., Dey, S., Yoshida, M.: H-SCAN+: a practical low-overhead RTL design-for-testability technique for industrial designs. In: Proceedings of ITC (1997)

3. Benso, A., Di Carlo, S., Di Natale, G., Prinetto, P., Lobetti Bodoni, M.: A programmable BIST architecture for clusters of multiple-port srams. In: Proceedings of International Test Conference, pp. 557–566 (2000). doi: 10.1109/TEST.2000.894249

4. Bhattacharya, S., Dey, S.: H-SCAN: a high level alternative to full-scan testing with reduced area and test application overheads. In: Proceedings of VLSI Test Symposium (1996)

5. Fonseca, C., Fleming, P.: An overview of evolutionary algorithms in multiobjective optimization. Evol. Comput. 3(1), 1–16 (1995). doi: 10.1162/evco.1995.3.1.1

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