Loop Nest Tiling for Image Processing and Communication Applications
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Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-48429-7_28
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1. PVL: Parallelization and Vectorization of Affine Perfectly Nested-Loops Considering Data Locality on Short-Vector Multicore Processors using Intrinsic Vectorization;Scalable Computing: Practice and Experience;2017-03-26
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