Author:
Azarian Ali,Cardoso João M. P.
Publisher
Springer International Publishing
Reference12 articles.
1. Kim, D., Kim, K., Kim, J., Lee, S., Yoo, H.: Memory-centric network-on-chip for power efficient execution of task-level pipeline on a multi-core processor. IET Computers & Digital Techniques 3(5), 513–524 (2009)
2. Ziegler, H., So, B., Hall, M., Diniz, P.: Coarse-grain pipelining on multiple FPGA architectures. In: Proc. 10th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2002, pp. 77–86 (2002)
3. Rodrigues, R., Cardoso, J.M.P., Diniz, P.C.: A data-driven approach for pipelining sequences of data-dependent loops. In: Proc. 15th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, pp. 219–228 (2007)
4. Azarian, A., Cardoso, J.M.P., Werner, S., Becker, J.: An FPGA-based multi-core approach for pipelining computing stages. In: Proc. 28th ACM Symposium on Applied Computing. SAC 2013, pp. 1533–1540. ACM (2013)
5. Ziegler, H., Hall, M., Diniz, P.: Compiler-generated communication for pipelined fpga applications. In: Proc. 40th Design Automation Conf., pp. 610–615 (2003)
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