Hardware Task Scheduling for Partially Reconfigurable FPGAs

Author:

Charitopoulos George,Koidis Iosif,Papadimitriou Kyprianos,Pnevmatikatos Dionisios

Publisher

Springer International Publishing

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Process-in-Memory realized by nonvolatile Task-Scheduling and Resource-Sharing XNOR-Net hardware Accelerator architectures;AEU - International Journal of Electronics and Communications;2024-05

2. Energy Efficient CLB Design Based on Adiabatic Logic for IoT Applications;Electronics;2024-03-31

3. Virtualization of Reconfigurable Mixed-Criticality Systems;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08

4. RTOS-supported low power scheduling of periodic hardware tasks in flash-based FPGAs;Microprocessors and Microsystems;2022-07

5. Scheduling of Hardware Tasks in Reconfigurable Mixed-Criticality Systems;2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2022-05-15

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