Energy Efficient System Architectures

Author:

Kolodny Avinoam

Publisher

Springer International Publishing

Reference11 articles.

1. http://www.nrdc.org/energy/data-center-efficiency-assessment.asp

2. R. Dennard, Design of ion-implanted MOSFETs with very small physical dimensions. IEEE J. Solid State Circuits SC-9(5), 256–268 (1974)

3. F.J. Pollack, New micro architecture challenges in the coming generations of CMOS process technologies (keynote address) (abstract only), in Proceedings of the 32nd Annual ACM/IEEE International Symposium on Micro Architecture (MICRO 32) (1999)

4. K. Moiseev, A. Kolodny, S. Wimer, Multi-Net Interconnect Optimization (Springer, 2015). ISBN 978-1-4614-0820-8

5. N. Magen, A. Kolodny, U. Weiser N. Shamir, Interconnect power dissipation in a microprocessor, in International Workshop on System Level Interconnect Prediction pp. 7–13 (2004)

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