Circuit Design for Data Conversion
Author:
Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-11427-9_7
Reference21 articles.
1. D. Raiteri, F. Torricelli, P.V. Lieshout, A.H.M.V. Roermund, E. Cantatore, A synchronous rail-to-rail latched comparator based on double-gate organic thin-film-transistors. IEEE European Solid-State Cirucit Conference, pp. 141–144, 2012
2. D. Raiteri et al., A 6b 10MS/s current-steering DAC manufactured with amorphous Gallium–Indium–Zinc–Oxide TFTs achieving SFDR > 30dB up to 300 kHz. IEEE International Solid-State Circuits Conference, pp. 314–316, 2012
3. D. Raiteri, P.v. Lieshout, A.v. Roermund, E. Cantatore, An organic VCO-based ADC for Quasi-Static signals achieving 1LSB INL at 6b resolution. IEEE International Solid-State Circuits Conference, pp. 108–109, 2013
4. B. Razavi, B.A. Wooley, Design techniques for high-speed, high-resolution comparators. IEEE J. Solid-State Circuits 27(12), 1916–1926 (1992)
5. M.J.M. Pelgrom, H.P. Tuinhout, M. Vertregt, Transistor matching in analog CMOS applications. International Electron Devices Meeting, pp. 915–918, 1998
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