Author:
Tradowsky Carsten,Cordero Enrique,Orsinger Christoph,Vesper Malte,Becker Jürgen
Publisher
Springer International Publishing
Reference8 articles.
1. Albonesi, D.: Selective cache ways: on-demand cache resource allocation. In: MICRO-32, Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture, pp. 248–259 (1999)
2. Gordon-Ross, A., Lau, J., Calder, B.: Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy. In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI - GLSVLSI 2008, pp. 379–382 (2008)
3. Malik, A., Moyer, B., Cermak, D.: A low power unified cache architecture providing power and performance flexibility (poster session). In: Proceedings of the International Symposium on Low Power Electronics and Design - ISLPED 2000, pp. 241–243 (2000)
4. Nowak, F., Buchty, R., Karl, W.: A run-time reconfigurable cache architecture. Adv. Parallel Comput. 15, 757–766 (2008)
5. Prokop, H.: Cache-oblivious algorithms. Master’s thesis, Massachusetts Institute of Technology (1999)
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