Compile Time Modeling of Off-Chip Memory Bandwidth for Parallel Loops

Author:

Tolubaeva Munara,Yan Yonghong,Chapman Barbara

Publisher

Springer International Publishing

Reference21 articles.

1. The Open64 compiler. http://open64.sourceforge.net

2. Agarwal, D., Liu, W., Yeung, D.: Exploiting application-level information to reduce memory bandwidth consumption. In: Proceedings of 4th Workshop on Complexity-Effective Design (2003)

3. Bailey, D.H., Barszcz, E., Barton, J.T., Browning, D.S., Carter, R.L., Dagum, D., Fatoohi, R.A., Frederickson, P.O., Lasinski, T.A., Schreiber, R.S., Simon, H.D., Venkatakrishnan, V., Weeratunga, S.K.: The NAS parallel benchmarks. Int. J. Supercomput. Appl. 5(3), 63–73 (1991)

4. Black, N., Moore, S., Weisstein, E.W.: Jacobi method. http://mathworld.wolfram.com/JacobiMethod.html

5. Coope, I.D.: Circle fitting by linear and nonlinear least squares. J. Optim. Theor. Appl. 76(2), 381–388 (1993)

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