Conclusions
Author:
Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-77479-4_11
Reference4 articles.
1. Kanduri, A., Haghbayan, M.H., Rahmani, A.M., Liljeberg, P., Jantsch, A., Tenhunen, H.: Dark silicon aware runtime mapping for many-core systems: A patterning approach. In: 33rd IEEE International Conference on Computer Design (ICCD), pp. 573–580 (2015). https://doi.org/10.1109/ICCD.2015.7357167
2. Rahmani, A.M., Haghbayan, M.H., Kanduri, A., Weldezion, A.Y., Liljeberg, P., Plosila, J., Jantsch, A., Tenhunen, H.: Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach. In: IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 219–224 (2015). https://doi.org/10.1109/ISLPED.2015.7273517
3. Haghbayan, M.H., Rahmani, A.M., Miele, A., Fattah, M., Plosila, J., Liljeberg, P., Tenhunen, H.: A power-aware approach for online test scheduling in many-core architectures. IEEE Trans. Comput. (TC) 65(3), 730–743 (2016). https://doi.org/10.1109/TC.2015.2481411
4. Yang, L., Liu, W., Jiang, W., Li, M., Yi, J., Sha, E.H.M.: FoToNoC: A hierarchical management strategy based on folded lorus-like network-on-chip for dark silicon many-core systems. In: 21st Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 725–730 (2016)
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