Timing analysis of concurrent programs running on shared cache multi-cores

Author:

Liang Yun,Ding Huping,Mitra Tulika,Roychoudhury Abhik,Li Yan,Suhendra Vivy

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Control and Optimization,Computer Networks and Communications,Computer Science Applications,Modelling and Simulation,Control and Systems Engineering

Reference39 articles.

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3. Alur R, Yannakakis M (1999) Model checking message sequence charts. In: Proceedings of the international conference on concurrency theory

4. Arm (2004) ARM Cortex A-8 technical reference manual. Revised March 2004. http://www.arm.com/products/CPUs/families/ARMCortexFamily.html

5. Arm (2007) ARM1156T2-S technical reference Manual. Revised July 2007. http://www.arm.com/products/CPUs/families/ARM11Family.html

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