Attacking the one-out-of-m multicore problem by combining hardware management with mixed-criticality provisioning

Author:

Kim NamhoonORCID,Ward Bryan C.,Chisholm Micaiah,Anderson James H.,Smith F. Donelson

Funder

National Science Foundation

Air Force Office of Scientific Research

Army Research Office

General Motors Corporation

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Control and Optimization,Computer Networks and Communications,Computer Science Applications,Modeling and Simulation,Control and Systems Engineering

Reference42 articles.

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2. Alhammad A, Wasly S, Pellizzoni R (2015) Memory efficient global scheduling of real-time tasks. In: Proceedings of the 21th IEEE real-time and embedded technology and applications symposium, pp 285–296

3. Altmeyer S, Douma R, Lunniss W, Davis R (2014) Evaluation of cache partitioning for hard real-time systems. In: Proceedings of the 26th euromicro conference on real-time systems, pp 15–26

4. Audsley N (2013) Memory architecture for NoC-based real-time mixed criticality systems. In: Proceedings of the 1st international workshop on mixed criticality systems, pp 37–42

5. Baker T, Shaw A (1988) The cyclic executive model and ADA. In: Proceedings of the 9th IEEE real-time systems symposium, pp 120–129

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