Scalable and precise refinement of cache timing analysis via path-sensitive verification

Author:

Chattopadhyay Sudipta,Roychoudhury Abhik

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Control and Optimization,Computer Networks and Communications,Computer Science Applications,Modeling and Simulation,Control and Systems Engineering

Reference44 articles.

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4. Balakrishnan G, Reps TW (2004) Analyzing memory accesses in x86 executables. In: CC, pp 5–23

5. Balakrishnan G, Reps TW, Kidd N, Lal A, Lim J, Melski D, Gruian R, Yong SH, Chen CH, Teitelbaum T (2005) Model checking x86 executables with codesurfer/x86 and wpds++. In: CAV, pp 158–163

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