Low Power and Complexity Implementation of the Modified FFT with a New Bit-Slicing Scheme
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,General Computer Science
Link
https://link.springer.com/content/pdf/10.1007/s40031-023-00923-x.pdf
Reference27 articles.
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3. A. Samiha, B. Mohamed, H. Saliha, DFT processor implementation scheme based on Rader algorithm. IET Circuits Devices Syst. 13, 385–390 (2019). https://doi.org/10.1049/iet-cds.2018.5200
4. A. Gokhan, S. Levent, Introduction, in Radio Wave Propagation and Parabolic Equation Modeling (IEEE, 2018), pp. 1–14. https://doi.org/10.1002/9781119432166.ch1
5. V.A. Coutinho et al., A low-SWaP 16-beam 2.4 GHz digital phased array receiver using DFT approximation. IEEE Trans. Aerosp. Electron. Syst. 56(5), 3645–3654 (2020). https://doi.org/10.1109/TAES.2020.2987094
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