Author:
Rivera Gabriel,Tseng Chau-Wen
Publisher
Springer Berlin Heidelberg
Reference26 articles.
1. Bacon, D., Chow, J.-H., Ju, D.-C., Muthukumar, K., Sarkar, V.: A compiler framework for restructuring data declarations to enhance cache and TLB effectiveness. In: Proceedings of CASCON 1994, Toronto, Canada (October 1994)
2. Bailey, D.: Unfavorable strides in cache memory systems. Technical Report RNR- 92-015, NASA Ames Research Center (May 1992)
3. Callahan, D., Carr, S., Kennedy, K.: Improving register allocation for subscripted variables. In: Proceedings of the SIGPLAN 1990 Conference on Programming Language Design and Implementation, White Plains, NY (June 1990)
4. Carr, S., Kennedy, K.: Compiler blockability of numerical algorithms. In: Proceedings of Supercomputing 1992, Minneapolis, MN (November 1992)
5. Cierniak, M., Li, W.: Unifying data and control transformations for distributed shared-memory machines. In: Proceedings of the SIGPLAN 1995 Conference on Programming Language Design and Implementation, La Jolla, CA (June 1995)
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