An End-to-End Application System of AVS: AVS-IPTV in China
Author:
Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-540-77255-2_6.pdf
Reference6 articles.
1. Sheng, B., Gao, W., Xie, D., Wu, D.: An Efficient VLSI Architecture of VLD for AVS HDTV Decoder. IEEE Transactions on Consumer Electronics 52(2), 696–701 (2006)
2. Sheng, B., Gao, W., Xie, D.: Algorithmic and Architectural Co-design for Integer Motion Estimation of AVS. IEEE Transactions on Consumer Electronics 52(3), 1092–1098 (2006)
3. Zheng, J.-H., Deng, L., Zhang, P., Xie, D.: An Efficient VLSI Architecture for Motion Compensation of AVS HDTV Decoder. Journal of Computer Science & Technology 21(3), 370–377 (2006)
4. Horowitz, M., Joch, A., Kossentini, F., Hallapuro, A.: H.264/AVC Baseline Profile Decoder Complexity Analysis. IEEE Transactions on Circuits and Systems for Video Technology 13(7), 704–716 (2003)
5. Lappalainen, V., Hallapuro, A., Hämäläinen, T.D.: Complexity of Optimized H.26L Video Decoder Implementation. IEEE Transactions on Circuits and Systems for Video Technology 13(7), 717–725 (2003)
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