Author:
Jhang Kyoung-Sun,Yi Kang,Hwang Soo Yun
Publisher
Springer Berlin Heidelberg
Reference9 articles.
1. Langen, D., Brinkmann, A., Ruckert, U.: High Level Estimation of the Area and Power Consumption of On-Chip Interconnects. In: Proc. of the 13th Annual IEEE International ASIC/SOC Conference, September 2000, pp. 297–301 (2000)
2. AMBA 2.0 Specification, http://www.arm.com/products/solutions/AMBA_Spec.html
3. The CoreConnect Bus Architecture, http://www-3.ibm.com/chips/products/coreconnect/
4. Wishbone, http://www.opencores.org
5. Seceleanu, T., Plosila, J., Liljeberg, P.: On-Chip Segmented Bus: A Self-timed approach. In: IEEE ASIC SoC Conference (2002)
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