Dynamic Hardware Reconfigurations: Performance Impact for MPEG2

Author:

Moscu Panainte Elena,Bertels Koen,Vassiliadis Stamatis

Publisher

Springer Berlin Heidelberg

Reference12 articles.

1. Campi, F., Toma, M., Lodi, A., Cappelli, A., Canegallo, R., Guerrieri, R.: A VLIW Processor with Reconfigurable Instruction Set for Embedded Applications. In: In ISSCC Digest of Technical Papers, pp. 250–251 (2003)

2. Lecture Notes in Computer Science;M. Sima,2002

3. Becker, J.: Configurable Systems-on-Chip: Commercial and Academic Approaches. In: Proc. of 9th IEEE Int. Conf. on Electronic Circuits and Systems - ICECS, Dubrovnik, Croatia, pp.809–812 (2002)

4. Gokhale, M.B., Stone, J.M.: Napa C: Compiling for a Hybrid RISC/FPGA Architecture. In: Proceedings of FCCM, Napa Valley, CA, pp.126–137 (1998)

5. Rosa, A.L., Lavagno, L., Passerone, C.: Hardware/Software Design Space Exploration for a Reconfigurable Processor. In: Proc. of DATE, Munich, Germany, pp.570–575 (2003)

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