Verification Technology Transfer

Author:

Kurshan R. P.

Publisher

Springer Berlin Heidelberg

Reference30 articles.

1. Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., Zhu, Y.: Symbolic model checking using SAT procedures instead of BDDs. In: Proc. 36th Design Automation Conference, pp. 317–320. IEEE Computer Society Press, Los Alamitos (1999)

2. Berry, G., Gonthier, G.: The Esterel Synchronous Programming Language: Design, Semantics, Implementation. Science of Computer Programming, vol. 19, pp. 87–152 (1992)

3. Bledsoe, W.W., Loveland, D.W. (eds.): Automated Theorem Proving: After 25 Years, Contemporary Math. 29, pp. 119???132. Amer. Math. Soc. (1984);

4. Especially the paper Proof-Checking, Theorem-Proving and Program Verification by R. S. Boyer and J. S. Moore

5. Ball, T., Rajamani, S.K.: The SLAM Project: Debugging System Software via Static Analysis. In: Symposium on Principles of Programming Languages (POPL), pp. 1–3. ACM (January 2002)

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2. A methodology to take credit for high-level verification during RTL verification;Formal Methods in System Design;2017-09-19

3. From Löwenheim to PSL and SVA;Lecture Notes in Computer Science;2014

4. Time in Hardware Modeling and Design;Modeling Time in Computing;2012

5. Making Software Verification Tools Really Work;Automated Technology for Verification and Analysis;2011

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