Author:
Mische Jörg,Uhrig Sascha,Kluge Florian,Ungerer Theo
Publisher
Springer Berlin Heidelberg
Reference18 articles.
1. Siemens VDO: IAA 2007: A New direction in electronics architecture –A Modular concept enables new functions. Press release SV 200709.007 en
2. Mische, J., Uhrig, S., Kluge, F., Ungerer, T.: Exploiting Spare Resources of In-order SMT Processors Executing Hard Real-time Threads. In: Proceedings of the 26th IEEE International Conference on Computer Design (October 2008)
3. Tullsen, D.M., Eggers, S.J., Emer, J.S., Levy, H.M., Lo, J.L., Stamm, R.L.: Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor. In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, pp. 191–202 (May 1996)
4. Raasch, S.E., Reinhardt, S.K.: Applications of Thread Prioritization in SMT Processors. In: Proceedings of the 1999 Workshop on Multithreaded Execution, Architecture, and Compilation (January 1999)
5. Jain, R., Hughes, C.J., Adve, S.V.: Soft Real-Time Scheduling on Simultaneous Multithreaded Processors. In: Proceedings of the 23rd IEEE International Real-Time Systems Symposium, pp. 134–145 (December 2002)
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